Wayne Burleson

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Daniel HolcombAssociate Professor, University of MassachusettsDirección de correo verificada de engin.umass.edu
Christof PaarMax Planck Institute for Security and Privacy, BochumDirección de correo verificada de rub.de
Mircea R. StanVirginia Microelectronics Consortium (VMEC) Professor, University of VirginiaDirección de correo verificada de virginia.edu
Lang LinANSYS, Intel, UMassDirección de correo verificada de ansys.com
Basab DattaIntel, Netronome, Advanced Micro Devices, PhD - University of Massachusetts-AmherstDirección de correo verificada de intel.com
Raghavan KumarIntel LabsDirección de correo verificada de intel.com
Georg Tobias BeckerDCSO GmbHDirección de correo verificada de ruhr-uni-bochum.de
Lilian BossuetProfessor, University of Lyon, Saint-Etienne - Laboratoire Hubert Curien - CNRSDirección de correo verificada de univ-st-etienne.fr
Vikram SureshASIC Architect, Block IncDirección de correo verificada de squareup.com
Ahmed MahmoudTechnical University in MunichDirección de correo verificada de tum.de
Jan SoelterHochschule StralsundDirección de correo verificada de hochschule-stralsund.de
Farinaz KoushanfarProfessor and Siavouche Nemat-Nasser Endowed Chair of ECE, UC San DiegoDirección de correo verificada de ucsd.edu
Amir RahmatiAssistant Professor, Stony Brook UniversityDirección de correo verificada de cs.stonybrook.edu
Tilman WolfProfessor of Electrical and Computer Engineering, University of Massachusetts AmherstDirección de correo verificada de umass.edu
Sandro CarraraFaculty (MER), EPFL (École Polytechnique Fédérale de Lausanne)Dirección de correo verificada de epfl.ch
Giovanni De MicheliEPFL, StanfordDirección de correo verificada de epfl.ch
Louis ScharfResearch Professor of Mathematics, Colorado State UniversityDirección de correo verificada de engr.colostate.edu
Tim GüneysuChair for Security Engineering, Ruhr-Universität BochumDirección de correo verificada de rub.de
Ian G. HarrisUniversity of California IrvineDirección de correo verificada de ics.uci.edu
John StankovicProfessor of Computer Science, University of VirginiaDirección de correo verificada de virginia.edu

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Wayne Burleson

University of Massachusetts Amherst

Dirección de correo verificada de ecs.umass.edu

VLSI Design Low-power Hardware Security


Título Ordenar por citas Ordenar por año Ordenar por título	Citado por Citado por	Año
Bus-invert coding for low-power I/O MR Stan, WP Burleson IEEE Transactions on very large scale integration (VLSI) systems 3 (1), 49-58, 1995	1460	1995
Power-up SRAM state as an identifying fingerprint and source of true random numbers DE Holcomb, WP Burleson, K Fu IEEE Transactions on Computers 58 (9), 1198-1210, 2008	1044	2008
PUF modeling attacks on simulated and silicon data U Rührmair, J Sölter, F Sehnke, X Xu, A Mahmoud, V Stoyanova, G Dror, ... IEEE transactions on information forensics and security 8 (11), 1876-1891, 2013	671	2013
Reconfigurable computing for digital signal processing: A survey R Tessier, W Burleson Journal of VLSI signal processing systems for signal, image and video …, 2001	578	2001
Initial SRAM state as a fingerprint and source of true random numbers for RFID tags DE Holcomb, WP Burleson, K Fu Proceedings of the Conference on RFID Security 7 (2), 01, 2007	502	2007
Stealthy dopant-level hardware trojans GT Becker, F Regazzoni, C Paar, WP Burleson Cryptographic Hardware and Embedded Systems-CHES 2013: 15th International …, 2013	381	2013
Wave-pipelining: a tutorial and research survey WP Burleson, M Ciesielski, F Klass, W Liu IEEE Transactions on very large scale integration (vlsi) systems 6 (3), 464-474, 1998	343	1998
Trojan side-channels: Lightweight hardware trojans through side-channel engineering L Lin, M Kasper, T Güneysu, C Paar, W Burleson Cryptographic Hardware and Embedded Systems-CHES 2009: 11th International …, 2009	272	2009
Low-power encodings for global communication in CMOS VLSI MR Stan, WP Burleson IEEE transactions on very large scale integration (VLSI) systems 5 (4), 444-455, 1997	237	1997
Cybersecurity of Hospitals: discussing the challenges and working towards mitigating the risks ST Argaw, JR Troncoso-Pastoriza, D Lacey, MV Florin, F Calcavecchia, ... BMC medical informatics and decision making 20, 1-10, 2020	224	2020
MOLES: Malicious off-chip leakage enabled by side-channels L Lin, W Burleson, C Paar Proceedings of the 2009 international conference on computer-aided design …, 2009	202	2009
Design challenges for secure implantable medical devices W Burleson, SS Clark, B Ransford, K Fu Proceedings of the 49th annual design automation conference, 12-17, 2012	180	2012
Efficient power and timing side channels for physical unclonable functions U Rührmair, X Xu, J Sölter, A Mahmoud, M Majzoobi, F Koushanfar, ... Cryptographic Hardware and Embedded Systems–CHES 2014: 16th International …, 2014	174	2014
On design of a highly secure PUF based on non-linear current mirrors R Kumar, W Burleson 2014 IEEE international symposium on hardware-oriented security and trust …, 2014	130	2014
Dynamically configurable security for SRAM FPGA bitstreams L Bossuet, G Gogniat, W Burleson International Journal of Embedded Systems 2 (1-2), 73-85, 2006	119	2006
Trading off transient fault tolerance and power consumption in deep submicron (DSM) VLSI circuits A Maheshwari, W Burleson, R Tessier IEEE transactions on very large scale integration (VLSI) systems 12 (3), 299-311, 2004	115	2004
Reconfigurable hardware for high-security/high-performance embedded systems: The SAFES perspective G Gogniat, T Wolf, W Burleson, JP Diguet, L Bossuet, R Vaslin IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (2), 144-155, 2008	112	2008
A dynamically reconfigurable adaptive viterbi decoder S Swaminathan, R Tessier, D Goeckel, W Burleson Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field …, 2002	110	2002
Low-power sub-threshold design of secure physical unclonable functions L Lin, D Holcomb, DK Krishnappa, P Shabadi, W Burleson Proceedings of the 16th ACM/IEEE international symposium on Low power …, 2010	109	2010
Multicore soft error rate stabilization using adaptive dual modular redundancy R Vadlamani, J Zhao, W Burleson, R Tessier 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010	105	2010

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