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Zdenek Kotasek
Zdenek Kotasek
Dirección de correo verificada de fit.vutbr.cz
Título
Citado por
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Año
SEU simulation framework for Xilinx FPGA: First step towards testing fault tolerant systems
M Straka, J Kastil, Z Kotasek
2011 14th Euromicro Conference on Digital System Design, 223-230, 2011
672011
Polymorphic gates in design and test of digital circuits
L Sekanina, L Starecek, Z Kotasek, Z Gajda
Int. J. Unconv. Comput. 4 (2), 125-142, 2008
522008
Fault tolerant system design and SEU injection based testing
M Straka, J Kastil, Z Kotasek, L Miculka
Microprocessors and Microsystems 37 (2), 155-173, 2013
512013
Fault tolerant structure for sram-based fpga via partial dynamic reconfiguration
M Straka, J Kastil, Z Kotasek
2010 13th Euromicro Conference on Digital System Design: Architectures …, 2010
322010
Generic partial dynamic reconfiguration controller for fault tolerant designs based on FPGA
M Straka, J Kastil, Z Kotasek
NORCHIP 2010, 1-4, 2010
312010
Automatic discovery of RTL benchmark circuits with predefined testability properties
T Pecenka, Z Kotásek, L Sekanina, J Strnadel
2005 NASA/DoD Conference on Evolvable Hardware (EH'05), 51-58, 2005
282005
Modern fault tolerant architectures based on partial dynamic reconfiguration in fpgas
M Straka, J Kastil, Z Kotasek
13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and …, 2010
262010
Evolution of synthetic RTL benchmark circuits with predefined testability
T Pecenka, L Sekanina, Z Kotasek
ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (3 …, 2008
252008
Evolution of multifunctional combinational modules controlled by the power supply voltage
L Sekanina, L Starecek, Z Gajda, Z Kotasek
First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06), 186-193, 2006
242006
Functional verification based platform for evaluating fault tolerance properties
J Podivinsky, O Cekan, J Lojda, M Zachariasova, M Krcma, Z Kotasek
Microprocessors and Microsystems 52, 145-159, 2017
202017
The evaluation platform for testing fault-tolerance methodologies in electro-mechanical applications
J Podivinsky, O Cekan, M Simkova, Z Kotasek
Microprocessors and Microsystems 39 (8), 1215-1230, 2015
202015
Digital systems architectures based on on-line checkers
M Straka, Z Kotasek, J Winter
2008 11th EUROMICRO Conference on Digital System Design Architectures …, 2008
202008
Dependability analysis of fault tolerant systems based on partial dynamic reconfiguration implemented into FPGA
J Kastil, M Straka, L Miculka, Z Kotasek
2012 15th Euromicro Conference on Digital System Design, 250-257, 2012
182012
Automation and optimization of coverage-driven verification
Z Kotasek
2015 Euromicro Conference on Digital System Design, 87-94, 2015
172015
Checker design for on-line testing of Xilinx FPGA communication protocols
M Straka, J Tobola, Z Kotasek
22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI …, 2007
162007
High availability fault tolerant architectures implemented into fpgas
M Straka, Z Kotasek
2009 12th Euromicro Conference on Digital System Design, Architectures …, 2009
152009
Reduction of test vectors volume by means of gate-level reconfiguration
L Starecek, L Sekanina, Z Kotasek
2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and …, 2008
152008
Testability improvements based on the combination of analytical and evolutionary approaches at RT level
J Strnadel, Z Kotásek
Proceedings Euromicro Symposium on Digital System Design. Architectures …, 2002
152002
Interactive tool for behavioral level testability analysis
J Hlavička, Z Kotásek, R Růžička, J Strnadel
Proceedings of the IEEE ETW, 117-119, 2001
152001
Generic partial dynamic reconfiguration controller for transient and permanent fault mitigation in fault tolerant systems implemented into fpga
L Miculka, Z Kotasek
17th International Symposium on Design and Diagnostics of Electronic …, 2014
142014
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