Anupam Chattopadhyay

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Shivam BhasinNTU SingaporeDirección de correo verificada de ntu.edu.sg
Debjyoti BhattacharjeeimecDirección de correo verificada de imec.be
Prasanna RaviResearch Scientist, Temasek Labs@Nanyang Technological University, SingaporeDirección de correo verificada de ntu.edu.sg
Rainer LeupersRWTH AachenDirección de correo verificada de ice.rwth-aachen.de
Heinrich MeyrGrand Professor, cfAED, TU DresdenDirección de correo verificada de iss.rwth-aachen.de
Anubhab BaksiNanyang Technological University, SingaporeDirección de correo verificada de e.ntu.edu.sg
Debdeep MukhopadhyayProfessor, Dept of Computer Science and Engineering, IIT Kharagpur, IndiaDirección de correo verificada de cse.iitkgp.ac.in
Kwok-Yan LamNanyang Technological UniversityDirección de correo verificada de ntu.edu.sg
Jawad Haj-YahyaRivos Inc.Dirección de correo verificada de rivosinc.com
Dr. Ayesha KhalidSenior Lecturer @ Queens University Belfast (QUB), Belfast, NI, UKDirección de correo verificada de qub.ac.uk
Goutam PaulAssociate Professor, Cryptology & Security Research Unit (CSRU), Indian Statistical InstituteDirección de correo verificada de ieee.org
Manaar AlamPost-Doctoral Associate, New York University Abu DhabiDirección de correo verificada de nyu.edu
Zheng WangAssociate Professor, Shenzhen Institutes of Advanced TechnologyDirección de correo verificada de siat.ac.cn
Vikramkumar PudiIIT TirupatiDirección de correo verificada de iittp.ac.in
Naina GuptaResearch Fellow, NTU, SingaporeDirección de correo verificada de e.ntu.edu.sg
Farhad MerchantAssistant Professor, Bernoulli Institute and CogniGron, University of Groningen, The NetherlandsDirección de correo verificada de rug.nl
Arpan JatiPhD Scholar, IIIT-DelhiDirección de correo verificada de iiitd.ac.in
Sourav Sen Guptaimec, Leuven, BelgiumDirección de correo verificada de imec.be
Jakub BreierSenior Cybersecurity Manager, TTControl GmbH, Vienna, AustriaDirección de correo verificada de ttcontrol.com
Eike LinnIWE II, RWTH Aachen UniversityDirección de correo verificada de iwe.rwth-aachen.de

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Anupam Chattopadhyay

Associate Professor, CCDS, NTU, Singapore

Dirección de correo verificada de ntu.edu.sg

Computer Architecture Electronic Design Automation Hardware Security CPS Security


Título Ordenar por citas Ordenar por año Ordenar por título	Citado por Citado por	Año
Adversarial attacks and defences: A survey A Chakraborty, M Alam, V Dey, A Chattopadhyay, D Mukhopadhyay arXiv preprint arXiv:1810.00069, 2018	1154*	2018
Wireless communication and security issues for cyber–physical systems and the Internet-of-Things A Burg, A Chattopadhyay, KY Lam Proceedings of the IEEE 106 (1), 38-60, 2017	292	2017
A blockchain framework for insurance processes M Raikwar, S Mazumdar, S Ruj, SS Gupta, A Chattopadhyay, KY Lam 2018 9th IFIP international conference on new technologies, mobility and …, 2018	251	2018
LISA: A uniform ADL for embedded processor modeling, implementation, and software toolsuite generation A Chattopadhyay, H Meyr, R Leupers Processor description languages, 95-132, 2008	211*	2008
The programmable logic-in-memory (PLiM) computer PE Gaillardon, L Amarú, A Siemon, E Linn, R Waser, A Chattopadhyay, ... 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), 427-432, 2016	195	2016
Generic side-channel attacks on CCA-secure lattice-based PKE and KEMs P Ravi, SS Roy, A Chattopadhyay, S Bhasin IACR transactions on cryptographic hardware and embedded systems, 307-335, 2020	176	2020
Autonomous vehicle: Security by design A Chattopadhyay, KY Lam, Y Tavva IEEE Transactions on Intelligent Transportation Systems 22 (11), 7015-7029, 2020	140	2020
Look-ahead schemes for nearest neighbor optimization of 1D and 2D quantum circuits R Wille, O Keszocze, M Walter, P Rohrs, A Chattopadhyay, R Drechsler 2016 21st Asia and South Pacific design automation conference (ASP-DAC), 292-297, 2016	134	2016
Designing and modeling MPSoC processors and communication architectures H Meyr, O Schliebusch, A Wieferink, D Kammler, EM Witte, O Lüthje, ... Building ASIPS: The Mescal Methodology, 229-280, 2005	118*	2005
ReVAMP: ReRAM based VLIW architecture for in-memory computing D Bhattacharjee, R Devadoss, A Chattopadhyay Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017	98	2017
Security vulnerabilities of unmanned aerial vehicles and countermeasures: An experimental study V Dey, V Pudi, A Chattopadhyay, Y Elovici 2018 31st international conference on VLSI design and 2018 17th …, 2018	96	2018
High-performance hardware implementation for RC4 stream cipher SS Gupta, A Chattopadhyay, K Sinha, S Maitra, BP Sinha IEEE Transactions on Computers 62 (4), 730-743, 2012	96	2012
Processor modeling and design tools P Mishra, N Dutt EDA for IC System Design, Verification, and Testing, 8-1-8-21, 2018	86*	2018
Rapper: Ransomware prevention via performance counters M Alam, S Sinha, S Bhattacharya, S Dutta, D Mukhopadhyay, ... arXiv preprint arXiv:2004.01712, 2020	84	2020
Multistate memristive tantalum oxide devices for ternary arithmetic W Kim, A Chattopadhyay, A Siemon, E Linn, R Waser, V Rana Scientific reports 6 (1), 36652, 2016	79	2016
Mind the portability: A warriors guide through realistic profiled side-channel analysis S Bhasin, A Chattopadhyay, A Heuser, D Jap, S Picek, R Ranjan NDSS 2020-Network and Distributed System Security Symposium, 1-14, 2020	78	2020
Toward threat of implementation attacks on substation security: Case study on fault detection and isolation A Chattopadhyay, A Ukil, D Jap, S Bhasin IEEE Transactions on Industrial Informatics 14 (6), 2442-2451, 2017	77	2017
MUQUT: Multi-constraint quantum circuit mapping on NISQ computers D Bhattacharjee, AA Saki, M Alam, A Chattopadhyay, S Ghosh 2019 IEEE/ACM international conference on computer-aided design (ICCAD), 1-7, 2019	73	2019
Exploiting dynamic timing margins in microprocessors for frequency-over-scaling with instruction-based clock adjustment J Constantin, L Wang, G Karakonstantis, A Chattopadhyay, A Burg 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 381-386, 2015	73	2015
Depth-optimal quantum circuit placement for arbitrary topologies D Bhattacharjee, A Chattopadhyay arXiv preprint arXiv:1703.08540, 2017	72	2017

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