Zdenek Vasicek
Citado por
Citado por
Evoapprox8b: Library of approximate adders and multipliers for circuit design and benchmarking of approximation methods
V Mrazek, R Hrbacek, Z Vasicek, L Sekanina
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
Design of power-efficient approximate multipliers for approximate artificial neural networks
V Mrazek, SS Sarwar, L Sekanina, Z Vasicek, K Roy
2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-7, 2016
Evolutionary approach to approximate digital circuits design
Z Vasicek, L Sekanina
IEEE Transactions on Evolutionary Computation 19 (3), 432-444, 2014
Improving the accuracy and hardware efficiency of neural networks using approximate multipliers
MS Ansari, V Mrazek, BF Cockburn, L Sekanina, Z Vasicek, J Han
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (2), 317-328, 2019
ALWANN: Automatic layer-wise approximation of deep neural network accelerators without retraining
V Mrazek, Z Vasícek, L Sekanina, MA Hanif, M Shafique
2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2019
An evolvable hardware system in Xilinx Virtex II Pro FPGA
Z Vasicek, L Sekanina
International Journal of Innovative Computing and Applications 1 (1), 63-73, 2007
Novel hardware implementation of adaptive median filters
Z Vasicek, L Sekanina
2008 11th IEEE workshop on design and diagnostics of electronic circuits and …, 2008
autoax: An automatic design space exploration and circuit building methodology utilizing libraries of approximate components
V Mrazek, MA Hanif, Z Vasicek, L Sekanina, M Shafique
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
Approximating complex arithmetic circuits with formal error guarantees: 32-bit multipliers accomplished
M Češka, J Matyáš, V Mrazek, L Sekanina, Z Vasicek, T Vojnar
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 416-423, 2017
Formal verification of candidate solutions for post-synthesis evolutionary optimization in evolvable hardware
Z Vasicek, L Sekanina
Genetic Programming and Evolvable Machines 12, 305-327, 2011
Adaptive and energy-efficient architectures for machine learning: Challenges, opportunities, and research roadmap
M Shafique, R Hafiz, MU Javed, S Abbas, L Sekanina, Z Vasicek, ...
2017 IEEE Computer society annual symposium on VLSI (ISVLSI), 627-632, 2017
Approximate circuit design by means of evolvable hardware
L Sekanina, Z Vasicek
2013 IEEE International Conference on Evolvable Systems (ICES), 21-28, 2013
Repomo32-new reconfigurable polymorphic integrated circuit for adaptive hardware
L Sekanina, R Ruzicka, Z Vasicek, R Prokop, L Fujcik
2009 IEEE Workshop on Evolvable and Adaptive Hardware, 39-46, 2009
Scalable construction of approximate multipliers with formally guaranteed worst case error
V Mrazek, Z Vasicek, L Sekanina, H Jiang, J Han
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 26 (11 …, 2018
Libraries of approximate circuits: Automated design and application in CNN accelerators
V Mrazek, L Sekanina, Z Vasicek
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 10 (4 …, 2020
Cartesian GP in optimization of combinational circuits with hundreds of inputs and thousands of gates
Z Vasicek
Genetic Programming: 18th European Conference, EuroGP 2015, Copenhagen …, 2015
Automatic design of approximate circuits by means of multi-objective evolutionary algorithms
R Hrbacek, V Mrazek, Z Vasicek
2016 International Conference on Design and Technology of Integrated Systems …, 2016
Formal methods for exact analysis of approximate circuits
Z Vasicek
IEEE Access 7, 177309-177331, 2019
Efficient phenotype evaluation in cartesian genetic programming
Z Vašíček, K Slaný
Genetic Programming: 15th European Conference, EuroGP 2012, Málaga, Spain …, 2012
Towards low power approximate DCT architecture for HEVC standard
Z Vasicek, V Mrazek
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017
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