Thomas Eisenbarth
Thomas Eisenbarth
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A survey of lightweight-cryptography implementations
T Eisenbarth, S Kumar, C Paar, A Poschmann, L Uhsadel
IEEE Design & Test of Computers 24 (6), 522-533, 2007
S $ A: A shared cache attack that works across cores and defies VM sandboxing--and its application to AES
G Irazoqui, T Eisenbarth, B Sunar
2015 IEEE Symposium on Security and Privacy, 591-604, 2015
On the Power of Power Analysis in the Real World: A Complete Break of the KeeLoq Code Hopping Scheme
T Eisenbarth, T Kasper, A Moradi, C Paar, M Salmasizadeh, ...
Advances in Cryptology–CRYPTO 2008: 28th Annual International Cryptology …, 2008
Cachezoom: How SGX amplifies the power of cache attacks
A Moghimi, G Irazoqui, T Eisenbarth
Cryptographic Hardware and Embedded Systems–CHES 2017: 19th International …, 2017
Wait a minute! A fast, Cross-VM attack on AES
G Irazoqui, MS Inci, T Eisenbarth, B Sunar
Research in Attacks, Intrusions and Defenses: 17th International Symposium …, 2014
Correlation-enhanced power analysis collision attack
A Moradi, O Mischke, T Eisenbarth
Cryptographic Hardware and Embedded Systems, CHES 2010: 12th International …, 2010
Cache attacks enable bulk key recovery on the cloud
MS Inci, B Gulmezoglu, G Irazoqui, T Eisenbarth, B Sunar
Cryptographic Hardware and Embedded Systems–CHES 2016: 18th International …, 2016
Security of autonomous systems employing embedded computing and sensors
AM Wyglinski, X Huang, T Padir, L Lai, TR Eisenbarth, ...
IEEE micro 33 (1), 80-86, 2013
Seriously, get off my cloud! Cross-VM RSA Key Recovery in a Public Cloud
MS Inci, B Gulmezoglu, G Irazoqui, T Eisenbarth, B Sunar
Cryptology ePrint Archive, 2015
Cross processor cache attacks
G Irazoqui, T Eisenbarth, B Sunar
Proceedings of the 11th ACM on Asia conference on computer and …, 2016
Building a side channel based disassembler
T Eisenbarth, C Paar, B Weghenkel
Transactions on computational science X: special issue on security in …, 2010
MemJam: A False Dependency Attack Against Constant-Time Crypto Implementations
A Moghimi, J Wichelmann, T Eisenbarth, B Sunar
International Journal of Parallel Programming 47, 538-570, 2019
Compact implementation and performance evaluation of block ciphers in ATtiny devices
T Eisenbarth, Z Gong, T Güneysu, S Heyse, S Indesteege, S Kerckhof, ...
Progress in Cryptology-AFRICACRYPT 2012: 5th International Conference on …, 2012
Systematic reverse engineering of cache slice selection in Intel processors
G Irazoqui, T Eisenbarth, B Sunar
2015 Euromicro Conference on Digital System Design, 629-636, 2015
{TPM-FAIL}:{TPM} meets Timing and Lattice Attacks
D Moghimi, B Sunar, T Eisenbarth, N Heninger
29th USENIX Security Symposium (USENIX Security 20), 2057-2073, 2020
A Faster and More Realistic Flush+Reload Attack on AES
B Gülmezoğlu, MS Inci, G Irazoqui, T Eisenbarth, B Sunar
Constructive Side-Channel Analysis and Secure Design: 6th International …, 2015
Time-area optimized public-key engines:-cryptosystems as replacement for elliptic curves?
A Bogdanov, T Eisenbarth, A Rupp, C Wolf
International workshop on cryptographic hardware and embedded systems, 45-61, 2008
MicroEliece: McEliece for embedded devices
T Eisenbarth, T Güneysu, S Heyse, C Paar
International Workshop on Cryptographic Hardware and Embedded Systems, 49-64, 2009
Mascat: Preventing microarchitectural attacks before distribution
G Irazoqui, T Eisenbarth, B Sunar
Proceedings of the Eighth ACM Conference on Data and Application Security …, 2018
Cachequote: Efficiently recovering long-term secrets of SGX EPID via cache attacks
F Dall, G De Micheli, T Eisenbarth, D Genkin, N Heninger, A Moghimi, ...
IACR Transactions on Cryptographic Hardware and Embedded Systems, 2018
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