Pritish Narayanan
Pritish Narayanan
IBM Research - Almaden
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Deep learning with limited numerical precision
S Gupta, A Agrawal, K Gopalakrishnan, P Narayanan
International conference on machine learning, 1737-1746, 2015
Neuromorphic computing using non-volatile memory
GW Burr, RM Shelby, A Sebastian, S Kim, S Kim, S Sidler, K Virwani, ...
Advances in Physics: X 2 (1), 89-124, 2017
Experimental demonstration and tolerancing of a large-scale neural network (165 000 synapses) using phase-change memory as the synaptic weight element
GW Burr, RM Shelby, S Sidler, C Di Nolfo, J Jang, I Boybat, RS Shenoy, ...
IEEE Transactions on Electron Devices 62 (11), 3498-3507, 2015
Equivalent-accuracy accelerated neural-network training using analogue memory
S Ambrogio, P Narayanan, H Tsai, RM Shelby, I Boybat, C Di Nolfo, ...
Nature 558 (7708), 60-67, 2018
Access devices for 3D crosspoint memory
GW Burr, RS Shenoy, K Virwani, P Narayanan, A Padilla, B Kurdi, ...
Journal of Vacuum Science & Technology B 32 (4), 040802, 2014
Recent progress in analog memory-based accelerators for deep learning
H Tsai, S Ambrogio, P Narayanan, RM Shelby, GW Burr
Journal of Physics D: Applied Physics 51 (28), 283001, 2018
Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: Comparative performance analysis (accuracy, speed, and power)
GW Burr, P Narayanan, RM Shelby, S Sidler, I Boybat, C Di Nolfo, ...
2015 IEEE International Electron Devices Meeting (IEDM), 4.4. 1-4.4. 4, 2015
Fault-tolerant nanoscale processors on semiconductor nanowire grids
CA Moritz, T Wang, P Narayanan, M Leuchtenburg, Y Guo, C Dezan, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 54 (11), 2422-2437, 2007
MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays
RS Shenoy, GW Burr, K Virwani, B Jackson, A Padilla, P Narayanan, ...
Semiconductor Science and Technology 29 (10), 104005, 2014
Fully on-chip MAC at 14 nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format
P Narayanan, S Ambrogio, A Okazaki, K Hosokawa, H Tsai, A Nomura, ...
IEEE Transactions on Electron Devices 68 (12), 6629-6636, 2021
Toward on-chip acceleration of the backpropagation algorithm using nonvolatile memory
P Narayanan, A Fumarola, LL Sanches, K Hosokawa, SC Lewis, ...
IBM Journal of Research and Development 61 (4/5), 11: 1-11: 11, 2017
Bidirectional Non-Filamentary RRAM as an Analog Neuromorphic Synapse, Part I: Al/Mo/Pr0.7Ca0.3MnO3 Material Improvements and Device Measurements
K Moon, A Fumarola, S Sidler, J Jang, P Narayanan, RM Shelby, GW Burr, ...
IEEE Journal of the Electron Devices Society 6, 146-155, 2017
Reducing the impact of phase-change memory conductance drift on the inference of large-scale hardware neural networks
S Ambrogio, M Gallot, K Spoon, H Tsai, C Mackin, M Wesson, ...
2019 IEEE International Electron Devices Meeting (IEDM), 6.1. 1-6.1. 4, 2019
AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed
HY Chang, P Narayanan, SC Lewis, NCP Farinha, K Hosokawa, ...
IBM Journal of Research and Development 63 (6), 8: 1-8: 14, 2019
CMOS control enabled single-type FET NASIC
P Narayanan, M Leuchtenburg, T Wang, CA Moritz
2008 IEEE Computer Society Annual Symposium on VLSI, 191-196, 2008
Large-scale neural networks implemented with non-volatile memory as the synaptic weight element: Impact of conductance response
S Sidler, I Boybat, RM Shelby, P Narayanan, J Jang, A Fumarola, K Moon, ...
2016 46th European Solid-State Device Research Conference (ESSDERC), 440-443, 2016
An analog-AI chip for energy-efficient speech recognition and transcription
S Ambrogio, P Narayanan, A Okazaki, A Fasoli, C Mackin, K Hosokawa, ...
Nature 620 (7975), 768-775, 2023
Inference of long-short term memory networks at software-equivalent accuracy using 2.5 M analog phase change memory devices
H Tsai, S Ambrogio, C Mackin, P Narayanan, RM Shelby, K Rocki, ...
2019 Symposium on VLSI Technology, T82-T83, 2019
Perspective on training fully connected networks with resistive memories: Device requirements for multiple conductances of varying significance
G Cristiano, M Giordano, S Ambrogio, LP Romero, C Cheng, ...
Journal of Applied Physics 124 (15), 2018
Accelerating machine learning with non-volatile memory: Exploring device and circuit tradeoffs
A Fumarola, P Narayanan, LL Sanches, S Sidler, J Jang, K Moon, ...
2016 IEEE International Conference on Rebooting Computing (ICRC), 1-8, 2016
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Artículos 1–20