PipeCNN: An OpenCL-based open-source FPGA accelerator for convolution neural networks D Wang, K Xu, D Jiang
2017 International Conference on Field Programmable Technology (ICFPT), 279-282, 2017
97 2017 Sparse-YOLO: Hardware/software co-design of an FPGA accelerator for YOLOv2 Z Wang, K Xu, S Wu, L Liu, L Liu, D Wang
IEEE Access 8, 116569-116585, 2020
78 2020 PipeCNN: An OpenCL-based FPGA accelerator for large-scale convolution neuron networks D Wang, J An, K Xu
arXiv preprint arXiv:1611.02450, 2016
48 2016 An energy-efficient coarse-grained reconfigurable processing unit for multiple-standard video decoding L Liu, D Wang, M Zhu, Y Wang, S Yin, P Cao, J Yang, S Wei
IEEE Transactions on Multimedia 17 (10), 1706-1720, 2015
48 2015 An energy-efficient coarse-grained dynamically reconfigurable fabric for multiple-standard video decoding applications L Liu, C Deng, D Wang, M Zhu, S Yin, P Cao, S Wei
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 1-4, 2013
38 2013 GenExp: Multi-objective pruning for deep neural network based on genetic algorithm K Xu, D Zhang, J An, L Liu, L Liu, D Wang
Neurocomputing 451, 81-94, 2021
35 2021 ABM-SpConv: A novel approach to FPGA-based acceleration of convolutional neural network inference D Wang, K Xu, Q Jia, S Ghiasi
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
33 2019 A dedicated hardware accelerator for real-time acceleration of YOLOv2 K Xu, X Wang, X Liu, C Cao, H Li, H Peng, D Wang
Journal of Real-Time Image Processing 18, 481-492, 2021
31 2021 Design of high-throughput fixed-point complex reciprocal/square-root unit D Wang, MD Ercegovac, N Zheng
IEEE Transactions on Circuits and Systems II: Express Briefs 57 (8), 627-631, 2010
30 2010 DSP-efficient hardware acceleration of convolutional neural network inference on FPGAs D Wang, K Xu, J Guo, S Ghiasi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
28 2020 Complex division and square-root using CORDIC B Yang, D Wang, L Liu
2012 2nd International Conference on Consumer Electronics, Communications …, 2012
28 2012 SimRPU: A simulation environment for reconfigurable architecture exploration L Liu, D Wang, S Yin, Y Chen, M Zhu, S Wei
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (12 …, 2014
24 2014 Fast and accurate object detection in remote sensing images based on lightweight deep neural network L Lang, K Xu, Q Zhang, D Wang
Sensors 21 (16), 5460, 2021
23 2021 Adaptive semi-blind channel estimation for massive MIMO systems F Xu, Y Xiao, D Wang
2014 12th International Conference on Signal Processing (ICSP), 1698-1702, 2014
19 2014 A scalable OpenCL-based FPGA accelerator for YOLOv2 K Xu, X Wang, D Wang
2019 IEEE 27th Annual International Symposium on Field-Programmable Custom …, 2019
17 2019 A radix-8 complex divider for FPGA implementation D Wang, N Zheng, MD Ercegovac
2009 International Conference on Field Programmable Logic and Applications …, 2009
16 2009 A high-throughput fixed-point complex divider for FPGAs D Wang, P Ren, L Liu
IEICE Electronics Express 10 (4), 20120879-20120879, 2013
15 2013 Pilot scheduling based on water-filling algorithm in massive MIMO Z Zhou, D Wang
2016 6th International conference on electronics information and emergency …, 2016
14 2016 D Wang, JM Muller, N Brisebarre, MD Ercegovac
IEEE Transactions on Circuits and Systems II: Express Briefs 61 (9), 711-715, 2014
14 2014 A radix-16 combined complex division/square root unit with operand prescaling D Wang, MD Ercegovac
IEEE Transactions on Computers 61 (9), 1243-1255, 2011
14 2011 
Milos D. Ercegovac, Distinguished Pro...University of California, Los AngelesDirección de correo verificada de cs.ucla.edu
