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Sujoy Sinha Roy
Sujoy Sinha Roy
Associate Professor, IAIK, TU Graz
Dirección de correo verificada de iaik.tugraz.at - Página principal
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Compact ring-LWE cryptoprocessor
SS Roy, F Vercauteren, N Mentens, DD Chen, I Verbauwhede
Cryptographic Hardware and Embedded Systems–CHES 2014: 16th International …, 2014
3632014
Saber: Module-LWR based key exchange, CPA-secure encryption and CCA-secure KEM
JP D’Anvers, A Karmakar, S Sinha Roy, F Vercauteren
Progress in Cryptology–AFRICACRYPT 2018: 10th International Conference on …, 2018
3502018
FPGA-based high-performance parallel architecture for homomorphic computing on encrypted data
SS Roy, F Turan, K Jarvinen, F Vercauteren, I Verbauwhede
2019 IEEE International symposium on high performance computer architecture …, 2019
1922019
Generic side-channel attacks on CCA-secure lattice-based PKE and KEMs
P Ravi, SS Roy, A Chattopadhyay, S Bhasin
IACR transactions on cryptographic hardware and embedded systems, 307-335, 2020
1752020
High-speed polynomial multiplication architecture for ring-LWE and SHE cryptosystems
DD Chen, N Mentens, F Vercauteren, SS Roy, RCC Cheung, D Pao, ...
IEEE Transactions on Circuits and Systems I: Regular Papers 62 (1), 157-166, 2014
1632014
SABER: Mod-LWR based KEM (round 3 submission), 2020
A Basso, JMB Mera, JP D’Anvers, A Karmakar, SS Roy, ...
NIST Post-Quantum Cryptography Standardization Project, 2020
154*2020
Efficient software implementation of ring-LWE encryption
R De Clercq, SS Roy, F Vercauteren, I Verbauwhede
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 339-344, 2015
1492015
Efficient ring-LWE encryption on 8-bit AVR processors
Z Liu, H Seo, S Sinha Roy, J Großschädl, H Kim, I Verbauwhede
Cryptographic Hardware and Embedded Systems--CHES 2015: 17th International …, 2015
1292015
A masked ring-LWE implementation
O Reparaz, S Sinha Roy, F Vercauteren, I Verbauwhede
International Workshop on Cryptographic Hardware and Embedded Systems, 683-702, 2015
1182015
Magnifying side-channel leakage of lattice-based cryptosystems with chosen ciphertexts: The case study of kyber
Z Xu, O Pemberton, SS Roy, D Oswald, W Yao, Z Zheng
IEEE Transactions on Computers 71 (9), 2163-2176, 2021
1132021
High-speed instruction-set coprocessor for lattice-based key encapsulation mechanism: Saber in hardware
SS Roy, A Basso
IACR Transactions on Cryptographic Hardware and Embedded Systems, 443-466, 2020
1132020
HEAWS: An accelerator for homomorphic encryption on the Amazon AWS FPGA
F Turan, SS Roy, I Verbauwhede
IEEE Transactions on Computers 69 (8), 1185-1196, 2020
1092020
High precision discrete Gaussian sampling on FPGAs
S Sinha Roy, F Vercauteren, I Verbauwhede
International Conference on Selected Areas in Cryptography, 383-401, 2013
1072013
Saber on ARM CCA-secure module lattice-based key encapsulation on ARM
A Karmakar, JMB Mera, SS Roy, I Verbauwhede
IACR Transactions on Cryptographic Hardware and Embedded Systems, 243-266, 2018
982018
SABER: Mod-LWR based KEM (round 2 submission)
JP D’Anvers, A Karmakar, SS Roy, F Vercauteren
Round-2 submission to the NIST PQC project, 2019
93*2019
Pushing the Limits of High-Speed GF(2 m ) Elliptic Curve Scalar Multiplication on FPGAs
C Rebeiro, SS Roy, D Mukhopadhyay
Cryptographic Hardware and Embedded Systems–CHES 2012: 14th International …, 2012
822012
Additively homomorphic ring-LWE masking
O Reparaz, R de Clercq, SS Roy, F Vercauteren, I Verbauwhede
Post-Quantum Cryptography: 7th International Workshop, PQCrypto 2016 …, 2016
792016
Constant-time discrete gaussian sampling
A Karmakar, SS Roy, O Reparaz, F Vercauteren, I Verbauwhede
IEEE Transactions on Computers 67 (11), 1561-1571, 2018
732018
HEPCloud: An FPGA-based multicore processor for FV somewhat homomorphic function evaluation
SS Roy, K Järvinen, J Vliegen, F Vercauteren, I Verbauwhede
IEEE Transactions on Computers 67 (11), 1637-1650, 2018
682018
Compact and side channel secure discrete Gaussian sampling
SS Roy, O Reparaz, F Vercauteren, I Verbauwhede
Cryptology ePrint Archive, 2014
68*2014
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