| Reuse distance as a metric for cache behavior K Beyls, E D’Hollander Proceedings of the IASTED Conference on Parallel and Distributed Computing …, 2001 | 273 | 2001 |
| Generating cache hints for improved program efficiency K Beyls, EH D’Hollander Journal of Systems Architecture 51 (4), 223-250, 2005 | 125 | 2005 |
| Partitioning and labeling of loops by unimodular transformations E D'Hollander IEEE Transactions on parallel and distributed systems 3 (4), 465-476, 1992 | 101 | 1992 |
| Using hammock graphs to structure programs F Zhang, EH D'Hollander IEEE Transactions on Software Engineering 30 (4), 231-245, 2004 | 88 | 2004 |
| Estimation of the pore size distribution from the moisture characteristic EH d'Hollander Water Resources Research 15 (1), 107-112, 1979 | 84 | 1979 |
| Performance Modeling for FPGAs: Extending the Roofline Model with High‐Level Synthesis Tools B Da Silva, A Braeken, EH D’Hollander, A Touhafi International Journal of Reconfigurable Computing 2013 (1), 428078, 2013 | 82 | 2013 |
| Refactoring for data locality K Beyls, EH D'Hollander Computer 42 (2), 62-71, 2009 | 80 | 2009 |
| Discovery of locality-improving refactorings by reuse path analysis K Beyls, EH D’Hollander High Performance Computing and Communications: Second International …, 2006 | 77 | 2006 |
| Reuse distance-based cache hint selection K Beyls, EH D’Hollander Euro-Par 2002 Parallel Processing: 8th International Euro-Par Conference …, 2002 | 75 | 2002 |
| Visualizing the impact of the cache on program execution Y Yu, K Beyls, EH D'Hollander Proceedings Fifth International Conference on Information Visualisation, 336-341, 2001 | 43 | 2001 |
| Partitioning and labeling of index sets in do loops with constant dependence vectors E D'HOLLANDER 1989 International Conference on Parallel Processing, University Park, PA, 1989 | 43 | 1989 |
| Spike recognition and on-line classification by unsupervised learning system EH D'Hollander, GA Orban IEEE Transactions on Biomedical Engineering, 279-284, 1979 | 43 | 1979 |
| Finding and applying loop transformations for generating optimized FPGA implementations H Devos, K Beyls, M Christiaens, J Van Campenhout, EH D’Hollander, ... Transactions on High-Performance Embedded Architectures and Compilers I, 159-178, 2007 | 39 | 2007 |
| Comparing and combining GPU and FPGA accelerators in an image processing context B Da Silva, A Braeken, EH D'Hollander, A Touhafi, JG Cornelis, J Lemeire 2013 23rd International Conference on Field programmable Logic and …, 2013 | 33 | 2013 |
| Loop parallelization using the 3D iteration space visualizer Y Yu, EH D'HOLLANDER Journal of visual languages & computing 12 (2), 163-181, 2001 | 31 | 2001 |
| Software refactoring guided by multiple soft-goals Y Yu, J Mylopoulos, J Leite, L Liu, EH D'Hollander | 30 | 2003 |
| Intermediately executed code is the key to find refactorings that improve temporal data locality K Beyls, EH D'Hollander Proceedings of the 3rd conference on Computing Frontiers, 373-382, 2006 | 25 | 2006 |
| Compile-time cache hint generation for EPIC architectures K Beyls, E D’Hollander 2nd Workshop on Explicitly Parallel Instruction Computing Architecture and …, 2002 | 24 | 2002 |
| Platform-independent cache optimization by pinpointing low-locality reuse K Beyls, EH D’Hollander Computational Science-ICCS 2004: 4th International Conference, Kraków …, 2004 | 22 | 2004 |
| The fortran parallel transformer and its programming environment EH D'Hollander, F Zhang, Q Wang Information sciences 106 (3-4), 293-317, 1998 | 19 | 1998 |
