Erik Hagersten
Erik Hagersten
Dirección de correo verificada de - Página principal
Citado por
Citado por
DDM-a cache-only memory architecture
E Hagersten, A Landin, S Haridi
Computer 25 (9), 44-54, 1992
StatCache: A probabilistic approach to efficient and accurate data locality analysis
E Berg, E Hagersten
IEEE International Symposium on-ISPASS Performance Analysis of Systems and …, 2004
Queue locks on cache coherent multiprocessors
P Magnusson, A Landin, E Hagersten
Proceedings of 8th International Parallel Processing Symposium, 165-171, 1994
StatStack: Efficient modeling of LRU caches
D Eklov, E Hagersten
2010 IEEE International Symposium on Performance Analysis of Systems …, 2010
WildFire: A scalable path for SMPs
E Hagersten, M Koster
Proceedings Fifth International Symposium on High-Performance Computer …, 1999
Multiprocessing system configured to perform efficient write operations
EE Hagersten
US Patent 5,749,095, 1998
Fast data-locality profiling of native execution
E Berg, E Hagersten
Proceedings of the 2005 ACM SIGMETRICS international conference on …, 2005
Multiprocessing computer system employing local and global address spaces and COMA and NUMA access modes
EE Hagersten, PN Loewenstein
US Patent 5,887,138, 1999
Implementing snooping on a split-transaction computer system bus
A Singhal, B Liencres, J Price, FM Cerauskis, D Broniarczyk, G Cheung, ...
US Patent 5,978,874, 1999
Hierarchical backoff locks for nonuniform communication architectures
Z Radovic, E Hagersten
The Ninth International Symposium on High-Performance Computer Architecture …, 2003
A statistical multiprocessor cache model
E Berg, H Zeffer, E Hagersten
2006 IEEE International Symposium on Performance Analysis of Systems and …, 2006
Bandwidth bandit: Quantitative characterization of memory contention
D Eklov, N Nikoleris, D Black-Schaffer, E Hagersten
Proceedings of the 21st international conference on Parallel architectures …, 2012
The cache coherence protocol of the Data Diffusion Machine
E Hagersten, S Haridi, DHD Warren
Cache and Interconnect Architectures in Multiprocessors, 165-188, 1990
Cache pirating: Measuring the curse of the shared cache
D Eklov, N Nikoleris, D Black-Schaffer, E Hagersten
2011 International Conference on Parallel Processing, 165-175, 2011
Hierarchical smp computer system
EE Hagersten, MD Hill
US Patent 5,862,357, 1999
Toward scalable cache only memory architectures
E Hagersten
Royal Institute of Technology, 1992
Race-free interconnection networks and multiprocessor consistency
A Landin, E Hagersten, S Haridi
Proceedings of the 18th Annual International Symposium on Computer …, 1991
Efficient allocation of cache memory space in a computer system
EE Hagersten, MD Hill
US Patent 5,893,150, 1999
Fast modeling of shared caches in multicore systems
D Eklov, D Black-Schaffer, E Hagersten
proceedings of the 6th international conference on high performance and …, 2011
Directory-based, shared-memory, scaleable multiprocessor computer system having deadlock-free transaction flow sans flow control protocol
P Loewenstein, E Hagersten
US Patent 6,141,692, 2000
El sistema no puede realizar la operación en estos momentos. Inténtalo de nuevo más tarde.
Artículos 1–20